This application claims a priority from German Patent Application No. 100 36 703.8, filed Jul. 27, 2000, and the contents of the application are incorporated herein by reference.
This invention concerns a process and an apparatus for the correction of resamplers.
Resamplers, that is sampling-rate converters are used to convert a sampled digital input signal having one input sampling rate into a sampled digital output signal with a different output sampling rate. With a process of this invention there is an input signal having a sampling rate, or frequency, which is larger by an arbitrary factor (not necessarily by a whole number, or integer) than a symbol frequency or a chip frequency. With a Wideband Code Division Multiple Access (WCDMA) signal, every data symbol in a chip sequence is coded so that each symbol is of a plurality of chips. A binary change between two amplitude values can take place between the chips. The invention, however, is also suitable for other digital signals with then the term “chip frequency” being replaced by the term “symbol frequency” or “symbol rate”. Upon translating the input sampling rate into the symbol or chip frequency, the problem arises that the relationship between the input sampling rate and the symbol or chip frequency is only approximately known, since a timing generator of the resampler is not identical with a timing generator of the input sampling rate, and thus a drift between the two oscillators is possible. Further, an absolute phase position of the input sampling rate is unknown.
It is therefore an object of this invention to provide a process and an apparatus for the correction of a resampler with which a sampled input signal, which is subjected to an input sampling rate and which has a symbol or chip frequency that differs from that of the input sampling rate, is translated into a sampled output signal in which a sampling rate corresponds to the symbol or chip frequency by changing the input sampling rate by a resampling factor, with which a drift between the input sampling rate and the symbol or the chip frequency as well as an absolute, constant shifting of the phase of the input sampling rate are compensated.